MIC280-7BM6 TR【PDF 4/23 页】IC SUPERVISOR THERMAL SOT23-6

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Sheet目录45

1页 2页 3页 [4页]5页 6页 7页 8页

MIC280

Micrel

MIC280

May 2006

Symbol

Parameter

Condition

Min

Typ

Max Units

Serial Data I/O Pin, DATA

Low Output Voltage, Note 4

= 3mA

0.3

= 6mA

0.5

Low Input Voltage

3V d V

d 3.6V

0.8

High Input Voltage

3V d V

d 3.6V

2.1

5.5

Input Capacitance

Note 5

LEAK

Input Current

礎

Serial Clock Input, CLK

Low Input Voltage

3V d V

d 3.6V

0.8

High Input Voltage

3V d V

d 3.6V

2.1

5.5

Input Capacitance

Note 5

LEAK

Input Current

礎

Interrupt Output, /INT

Low Output Voltage, Note 4

= 3mA

0.3

= 6mA

0.5

INT

Interrupt Propagation Delay

from TEMPx < TLOWx or

CONV

] ms

Notes 5, 6

TEMPx > THIGHx or TEMPx >

CRITx to /INT < V

; R

PULLUP

= 10k&

nINT

Interrupt Reset Propagation Delay

from read of STATUS or A.R.A. to

祍

Note 5, 9

/INT > V

; R

PULLUP

= 10k&

LEAK

礎

Serial Interface Timing

CLK (Clock) Period

2.5

祍

Data In Setup Time to CLK High

100

Data Out Stable after CLK Low

300

Data Low Setup Time to CLK Low

Start Condition

100

Data High Hold Time after CLK

Stop Condition

100

High

Bus Timeout

Note 1. Exceeding the absolute maximum rating may damage the device.

Note 2. The device is not guaranteed to function outside its operating range. Final test on outgoing product is performed at T

= 25癈.

Note 3. Devices are ESD sensitive. Handling precautions recommended.

Note 4. Current into the /INT or DATA pins will result in self heating of the device. Sink current should be minimized for best accuracy.

Note 5. Guaranteed by design over the operating temperature range. Not 100% production tested.

Note 6. t

INT

and t

CRIT

are equal to t

CONV

Note 7. T

is the temperature of the remote diode junction. Testing is performed using a single unit of one of the transistors listed in Table 8.

Note 8. t

CONV

= t

CONV

(local) + t

CONV

(remote). Following the acquisition of either remote or local temperature data, the limit comparisons for that zone

are performed and the device status updated; Status bits will be set and /INT driven active, if applicable.

Note 9. The interrupt reset propogation delay is dominated by the capacitance on the bus.

Note 10. Accuracy specication does not include quantization noise, which may be up to ?/SPAN>

LSB.

Note 11. Tested at 10-bit resolution.

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